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? semiconductor components industries, llc, 2015 november, 2017 ? rev. 4 1 publication order number: FUSB302B/d FUSB302B FUSB302B programmable usb type\c controller w/pd description the FUSB302B targets system designers looking to implement a drp/src/snk usb type-c c onnector with low amount of programmability . the FUSB302B enables the usb type-c detection including attach, and orientation. the FUSB302B integrates the physical layer of the usb bmc power delivery protocol to allow up to 100 w of power and role swap. the bmc pd block enables full support for alternative interfaces of the type-c specification. features ? dual-role functionality with autonomous drp toggle ? ability to connect as either a host or a device based on what has been attached ? software configurable either as a dedicated host, dedicated device, or dual role ? dedicated devices can operate both on a type-c receptacle or a type-c plug with a fixed cc and vconn channel ? full type-c 1.2 support. integrates the following functionality of the cc pin: ? attach/detach detection as host ? current capability indication as host ? current capability detection as device ? audio adapter accessory mode ? debug accessory mode ? active cable detection ? integrates ccx to vconn switch with over - current limiting for powering usb3.1 full featured cables ? usb power delivery (pd) 2.0, version 1.2 support: ? automatic goodcrc packet response ? automatic retries of sending a packet if a goodcrc is not received ? automatic soft reset packet sent with retries if needed ? automatic hard reset ordered set sent ? dead battery support (snk mode support when no power applied) ? low power operation: i cc = 25 a (typical) ? aec?q100 automotive qualified temperature grade 2: (?40 c to +105 c) ? packaged in: ? 9-ball wlcsp (1.215 mm 1.260 mm) ? 14-lead mlp (2.5 mm 2.5 mm, 0.5 mm pitch) applications ? smartphones ? tablets ? laptops ? notebooks ? power adapters ? cameras ? dongles ? automotive www. onsemi.com wlcsp9 case 567tn see detailed ordering and shipping information on page 2 o f this data sheet. ordering information wqfn14 case 510br
FUSB302B www. onsemi.com 2 figure 1. block diagram cc2 cc1 vbus vconn charger ovp processor usb 3.1 usb switch tx1/rx1 tx2/rx2 5gbps i 2 c usb type-c detection control pd fusb302 usb type-c connector table 1. ordering information part number top mark operating temperature range package shipping ? FUSB302Bucx h4 ?40 to 85 c 9-ball wafer-level chip scale package (wlcsp), 0.4 mm pitch 3,000 / tape and reel FUSB302Bmpx ua ?40 to 85 c 14-lead mlp 2.5 mm 2.5 mm, 0.5 mm pitch FUSB302B01mpx up FUSB302B10mpx us FUSB302B11mpx ut FUSB302Bvmpx da ?40 to 105 c ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d .
FUSB302B www. onsemi.com 3 typical application figure 2. typical application cc 1 cc 2 logic & control i2c/ registers vbus int_n i2c_sda i2c_scl gnd usb_3.1 1 usb_3.1 2 gnd gnd rx2+ tx2+ rx2? tx2? vbus sbu1 cc2 d? d+ d+ d? cc1 sbu2 vbus tx1? rx1? tx1+ rx1+ fusb340 usb 3.1 2:1 switch type?c FUSB302B 3.0v reg gnd vconn vdd vbus processor ovp charger bat dual?role detection auto toggle switch matrix cc detection / control powered cable audio adapter / debug acc bmc i/o dac comparator 1.71v to v block diagram figure 3. functional block diagram bmc physical layer vconn cc1 fifo fifo code/ control logic bmc driver cdr int_n sda scl processor (software) type?c connection states : ? source ? sink ? sink with accessory support ? dual?role port ? dual?role port with accessory support pd (provider/consumer) crc32 tx crc32 rx 4b5b 4b5b device policy manager policy engine protocol type?c pd/ vdm vbus r d bmc bmc FUSB302B i 2 c reg switch settings comp. status control settings pd status pd configuration fifo access r d cc2 dac
FUSB302B www. onsemi.com 4 pin configuration figure 4. FUSB302Bucx pin assignment cc2 vconn 1 cc2 vbus vdd vconn int_n scl cc1 gnd sda a b c 1 vbus int_n gnd a b c 2 vdd scl sda 3 cc1 top through view bottom view 23 table 2. pin map column 1 column 2 column 3 row a cc2 vbus vdd row b vconn int_n scl row c cc1 gnd sda
FUSB302B www. onsemi.com 5 2 vbus 1 cc2 3 vdd 4 vdd 5 int_n 6 scl 7 sda 8 gnd 9 gnd 10 cc1 11 cc1 12 vconn 13 vconn 14 cc2 9 gnd 10 cc1 8 gnd 7 sda 6 scl 5 int_n 4 vdd 3 vdd 2 vbus 1 cc2 14 cc2 13 vconn 12 vconn 11 cc1 top through view bottom view connect to gnd for thermal connect to gnd for thermal figure 5. FUSB302Bmpx pin assignment (n/c = no connect) table 3. pin description name type description usb type-c connector interface cc1/cc2 i/o type-c connector configuration channel (cc) pins. initially used to determine when an attach has occurred and what the orientation of the insertion is. functionality after attach depends on mode of operation detected. operating as a host: 1. sets the allowable charging current for vbus to be sensed by the attached device 2. used to communicate with devices using usb bmc power delivery 3. used to detect when a detach has occurred operating as a device: 1. indicates what the allowable sink current is from the attached host. used to communicate with devices using usb bmc power delivery gnd ground ground vbus input vbus input pin for attach and detach detection when operating as an upstream facing port (device). expected to be an ovp protected input. power interface vdd power input supply voltage. vconn power switch regulated input to be switched to correct cc pin as vconn to power usb3.1 full-featured cables and other accessories. signal interface scl input i 2 c serial clock signal to be connected to the phone-based i 2 c master. sda open-drain i/o i 2 c serial data signal to be connected to the phone-based i 2 c master int_n open-drain output active low open drain interrupt output used to prompt the processor to read the i 2 c register bits
FUSB302B www. onsemi.com 6 configuration channel switch the FUSB302B integrates the control and detection functionality required to implement a usb type-c host, device or dual-role port including: ? device port pull-down (r d ) ? host port pull-up (i p ) ? vconn power switch with ocp for full-featured usb3.1 cables ? usb bmc power delivery physical layer ? configuration channel (cc) threshold comparators each cc pin contains a flexible switch matrix that allows the host software to control what type of type-c port is implemented. the switches are shown in figure 6. figure 6. configuration channel switch functionality bmc i/o dac/ comparator pwdnx reg vconn_ccx reg current source pull?ups meas_ccx reg txccx reg pu_enx reg 5.1k vconn_switch vconn meas_cc_switch tx_bmc_switch pullup_switch pulldown_switch cc x type-c detection the FUSB302B implements multiple comparators and a programmable dac that can be used by software to determine the state of the cc and vbus pins. this status information provides the processor all of the information required to determine attach, detach and charging current configuration of the type-c port connection. the FUSB302B has three fixed threshold comparators that match the usb type-c specification for the three charging current levels that can be detected by a type-c device. these comparators automatically cause bc_lvl and comp interrupts to occur when there is a change of state. in addition to the fixed threshold comparators, the host software can use the 6-bit dac to determine the state of the cc lines more accurately. the FUSB302B also has a fixed comparator that monitors if vbus has reached a valid threshold or not. the dac can be used to measure vbus up to 20 v which allows the software to confirm that changes to the vbus line have occurred as expected based on pd or other communication methods to change the charging level . detection through autonomous device toggle the FUSB302B has the capability to do autonomous drp toggle. in autonomous toggle the FUSB302B internally controls the pdwn1, pdwn2, pu_en1 and pu_en2, meas_cc1 and meas_cc2 and implements a fixed drp toggle between presenting as a src and presenting as a snk. alternately, it can present as a src or snk only and poll cc1 and cc2 continuously.
FUSB302B www. onsemi.com 7 table 4. processor configures the FUSB302B through i 2 c i 2 c registers/bits value toggle 1 pwr 07h host_cur0 1 host_cur1 0 meas_vbus 0 vconn_cc1 0 vconn_cc2 0 mask register 0xfe maska register 0xbf maskb register (except i_togdone and i_bc_lvl interrupt) 0x01 pwr[3:0] 0xbf 1. once it has been determined what the role is of the FUSB302B, it returns i_togdone and togss1/2. 2. processor then can perform a final manual check through i 2 c. manual device toggle the FUSB302B has the capability to do manual drp toggle. in manual toggle the FUSB302B is configurable by the processor software by i 2 c and setting toggle = 0. manual device detection and configuration a type-c device must monitor vbus to determine if it is attached or detached. the FUSB302B provides this information through the vbusok interrupt. after the type-c device knows that a type-c host has been attached, it needs to determine what type of termination is applied to each cc pin. the software determines if an ra or rd termination is present based on the bc_lvl and comp interrupt and status bits. additionally, for rd terminations, the software can further determine what charging current is allowed by the type-c host by reading the bc_lvl status bits. this is summarized in table 5. toggle functionality when toggle bit (control2 register) is set the FUSB302B implements a fixed drp toggle between presenting as a src and as a snk. it can also be configured to present as a src only or snk only and poll cc1 and cc2 continuously. this operation is turned on with t oggle = 1 and the processor should initially write host_cur1 = 0, host_cur0 = 1 (for default current), vconn_cc1 = vconn_cc2 = 0, mask register = 0xfe, maska register = 0xbf, and maskb register = 0x01, and pwr = 0x01. the processor should also read the interrupt register to clear them prior to setting the toggle bit. table 5. device interrupt summary status type interrupt status meaning bc_lvl[1:0] comp comp setting vbusok cc detection 2?b00 na na 1 vra 2?b01 na na 1 vrd?connect and vrd?usb 2?b10 na na 1 vrd?connect and vrd?1.5 2?b11 0 6?b11_0100 (2.05 v) 1 vrd?connect and vrd?3.0 attach na na na 1 host attached, vbus valid detach na na na 0 host detached, vbus invalid the high level software flow diagram for a type-c device (snk) is shown in figure 7.
FUSB302B www. onsemi.com 8 figure 7. snk software flow disabled: FUSB302B in low power mode looking for an attach unattached.snk: host software enables FUSB302B pull?downs and measure block to detect attach FUSB302B i_togdone interrupt alerts host software that something has attached. attached.snk host software uses FUSB302B comparators and dac to determine attach orientation and port type audioaccessory debugaccessory FUSB302B i_vbusok interrupt alerts host software that an attach has occurred FUSB302B i_vbusok interrupt alerts host software that a detach has occurred host software determines that an accessory has been attached FUSB302B i_comp and i_vbusok interrupts alert host software that a accessory detach has occurred manual host detection and configuration when the FUSB302B is configured as a type-c host, the software can use the status of the comparators and dac to determine when a type-c device has been attached or detached and what termination type has been attached to each cc pin. the FUSB302B allows the host software to change the charging current capabilities of the port through the host_cur control bits. if the host_cur bits are changed prior to attach, the FUSB302B automatically indicates the programmed current capability when a device is attached. if the current capabilities are changed after a device is attached, the FUSB302B immediately changes the cc line to the programmed capability. figure 8. host_cur changed after attach cc host_cur[1:0] = default high current setting med current setting 0 v attach
FUSB302B www. onsemi.com 9 figure 9. host_cur changed prior to attach cc high current setting med current setting 0 v attach default current the type-c specification outlines different attach and detach thresholds for a type-c host that are based on how much current is supplied to each cc pin. based on the programmed host_cur setting, the software adjusts the dac comparator threshold to match the type-c specification requirements. the bc_lvl comparators can also be used as part of the ra detection flow. this is summarized in table 6. table 6. host interrupt summary termination host_cur[1:0] interrupt status attach/detach bc_lvl[1:0] comp comp setting ra 2?b01 2?b00 na na na 2?b10 2?b01 0 6?b00_1010 (0.42 v) 2?b11 2?b10 0 6?b01_0011 (0.8 v) rd 2?b01, 2?b10 na 0 6?b10_0110 (1.6 v) attach na 1 6?b10_0110 (1.6 v) detach 2?b11 na 0 6?b11_1110 (2.6 v) attach na 1 6?b11_1110 (2.6 v) detach the high level software flow diagram for a type-c host (src) is shown below in figure 10.
FUSB302B www. onsemi.com 10 figure 10. src software flow disabled: FUSB302B in low power mode looking for an attach unattached.src: host software enables FUSB302B pull?ups and measure block to detect attach FUSB302B i_togdone interrupt alerts host software that something has attached. attached.src host software configures FUSB302B based on insertion orientation and enables vbus and vconn audioaccessory debugaccessory host software utilizes i_comp and i_bc_lvl interrupts to determine an attach and what type of port is attached. FUSB302B i_comp interrupt alerts host software that a detach has occurred FUSB302B i_comp and i_vbusok interrupts alert host software that a accessory detach has occurred manual dual-role detection and configuration the type-c specification allows ports to be both a device and a host depending on what type of port has attached. this functionality is similar to usb otg ports with the current usb connectors and is called a dual-role port. the FUSB302B can be used to implement a dual-role port. a type-c dual role port toggles between presenting as a type-c device and a type-c host. the host software controls the toggle time and configuration of the FUSB302B in each state as shown in figure 11. figure 11. drp software flow disabled: FUSB302B in low power mode looking for an attach unattached.snk: host software enables FUSB302B pull?downs and measure block to detect attach FUSB302B i_togone interrupt alerts host software that something has attached. attached.snk host software uses FUSB302B comparators and dac to determine attach orientation and port type FUSB302B i_vbusok interrupt alerts host software that an attach has occurred FUSB302B i_vbusok interrupt alerts host software that a detach has occurred host software enables FUSB302B low power disabled state unattached.src: host software enables FUSB302B pull?ups and measure block to detect attach attached.src host software configures FUSB302B based on insertion orientation and enables vbus and vconn host software toggle expires host software utilizes i_comp and i_bc_lvl interrupts to determine an attach FUSB302B i_comp interrupt alerts host software that a detach has occurred
FUSB302B www. onsemi.com 11 bmc power delivery the type-c connector allows usb power delivery (pd) to be communicated over the connected cc pin between two ports. the communication method is the bmc power delivery protocol and is used for many different reasons with the t ype-c connector. possible uses are outlined below. ? negotiating and controlling charging power levels ? alternative interfaces such as mhl, display port ? vendor specific interfaces for use with custom docks or accessories ? role swap for dual-role ports that want to switch who is the host or device ? communication with usb3.1 full featured cables the FUSB302B integrates a thin bmc pd client which includes the bmc physical layer and packet fifos (48 bytes for transmit and 80 bytes for receive) which allows packets to be sent and received by the host software through i 2 c accesses. the FUSB302B allows host software to implement all features of usb bmc pd through writes and reads of the fifo and control of the FUSB302B physical interface. the FUSB302B uses tokens to control the transmission of bmc pd packets . these tokens are written to the transmit fifo and control how the packet is transmitted on the cc pin. the tokens are designed to be flexible and support all aspects of the usb pd specification. the FUSB302B additionally enables control of the bmc transmitter through tokens. the transmitter can be enabled or disabled by specific token writes which allow faster packet processing by burst writing the fifo with all the information required to transmit a packet. the FUSB302B receiver stores the received data and the received crc in the receive fifo when a valid packet is received on the cc pin. the bmc receiver automatically enables the internal oscillator when an activity is sensed on the cc pin and load to the fifo when a packet is received. the i_activity and i_crc_chk interrupts alert the host software that a valid packet was received. figure 12. usb bmc power delivery blocks fifo fifo code/ control logic bmc driver cdr crc32 tx crc32 rx 4b5b 4b5b bmc bmc cc1 cc2 power level determination the type-c specification outlines the order of precedence for power level determination which covers power levels from basic usb2.0 levels to the highest levels of usb pd. the host software is expected to follow the usb type-c specification for char ging current priority based on feedback from the FUSB302B detection, external bc1.2 detection and any usb power delivery communication. the FUSB302B does not integrate bc1.2 charger detection which is assumed available in the usb transceiver or usb charger in the system. power up, initialization and reset when power is first applied through vdd, the FUSB302B is reset and registers are initialized to the default values shown in the register map. the FUSB302B can be reset through software by programming the sw_res bit in the reset register. if no power applied to vdd then the src can recognize the FUSB302B as a snk. pd automatic receive goodcrc the power delivery packets require a goodcrc acknowledge packet to be sent for each received packet where the calculated crc is the correct value. this calculation is done by the FUSB302B and triggers the i_crc_chk interrupt if the crc is good. if the auto_crc (switches1 register bit) is set and auto_pre = 0, then the FUSB302B will automatically send the goodcrc control packet in response to alleviate the local processor from responding quickly to the received packet. if goodcrc is required for anything beyond sop, then enable sop*.
FUSB302B www. onsemi.com 12 pd send the FUSB302B implements part of the pd protocol layer for sending packets in an autonomous fashion. figure 13. hard reset soft reset automatic sending retries pd packet sent pd automatic sending retries if goodcrc packet is not received and auto_retry is set, then a retry of the same message that was in the txfifo written by the processor is executed within t retry and that is repeated for nretry times. pd send soft reset if the correct goodcrc packet is still not received for all retries then i_retryfail interrupt is triggered and if auto_soft_reset is set, then a soft reset packet is created (messageid is set to 0 and the processor upon servicing i_retryfail would set the true messageidcounter to 0. if this soft reset is sent successfully where a goodcrc control packet is received with a messageid = 0 then i_txsent interrupt occurs. if not, this soft reset packet is retried nretries times (messageid is always 0 for all retries) if a goodcrc acknowledge packet is not received with crcreceivet imer expiring (t receive of 1.1 ms max). if all retries fail, then i_softfail interrupt is triggered. pd send hard reset if all retries of the soft reset packet fail and if auto_hard_reset is set, then a hard reset ordered set is sent by loading up the txfifo with reset1, reset1, reset1, reset2 and sending a hard reset. note only one hard reset is sent since the typical retry mechanism doesn?t apply. the processor?s policy engine firmware is responsible for retrying the hard reset if it doesn?t receive the required response. flush rx-fifo with bist (built-in self test) test data during pd compliance testing, bist test packets are used to test physical layer of the pd interface such as, frequency derivation, amplitude measure and etc. the one bist test data packet has 7 data objects (28byte data), header and crc, but the message id doesn?t change, the packet should be ignored and not acted on by the pd policy engine. the pd protocol layer does need to send a goodcrc message back after every packet. the bist data can arrive continuously from a tester, which could cause the FUSB302B rx fifo to overflow and the pd protocol layer to stop sending goodcrc messages unless the fifo is read or cleared quickly. the FUSB302B has a special register bit in the i 2 c registers, bit[5] of address 0x09, that when the bit is set, all the data received next will be flushed from the rxfifo automatically and the pd protocol layer will keep sending goodcrc messages back. once bist test is done, tester sends hardreset, so with the hardreset, processor has to write the bit back to disable. also, if the bit can be de-selected anytime, then the coming packet has to be managed by protocol layer and policy engine. i 2 c interface the FUSB302B includes a full i 2 c slave controller. the i 2 c slave fully complies with the i 2 c specification version 6 requieremnts. this block is designed for fast mode plus traffic up to 1 mhz scl operation. the toggle features allow for very low power operation with slow clocking thus may not be fully compliant to the 1 mhz operation. examples of an i 2 c write and read sequence are shown in figure 14 and figure 15 respectively. figure 14. i 2 c write example swr a aaaa a p note: single byte read is initiated by master with p immediately following first data byte 8bits 8bits 8bits write data k+2 slave address register address k write data write data k+1 write data k+n1
FUSB302B www. onsemi.com 13 figure 15. i 2 c read example s wr a a s rd a a a na p register address to read specified note: 8bits if register is not specified master will begin read from current register. in this case only sequence showing in red bracket is needed single or multi byte read executed from current register location (single byte read is initiated by master with na immediately following first data byte) read data k+1 read data k+n-1 8bits 8bits 8bits slave address register address k read data k slave address from master to slave s start condition na not acknowledge (sda high) rd read =1 from slave to master a acknowledge (sda low) wr write=0 p stop condition table 7. absolute maximum ratings symbol parameter min max unit vv dd supply voltage from v dd ?0.5 6.0 v v cc_hddrp cc pins when configured as host, device or dual role port ?0.5 6.0 v v vbus vbus supply voltage ?0.5 28 .0 v t storage storage temperature range ?65 +150 c t j maximum junction temperature ? +150 c t l lead temperature (soldering, 10 seconds) ? +260 c esd human body model, ansi/esda/jedec js?001?2012 4 ? kv charged device model, jedec jesd22?c101 1 ? stresses exceeding those listed in the maximum ratings table may damage the device. if any of these limits are exceeded, device function ality should not be assumed, damage may occur and reliability may be affected. table 8. recommended operating conditions symbol parameter min typ max unit v vbus vbus supply voltage 4.0 5 .0 21 .0 v v vdd vdd supply voltage 2.7 (note 3) 3.3 5.5 v v vconn vconn supply voltage 2.7 ? 5.5 v i vconn vconn supply current ? ? 560 ma t a operating temperature ?40 ? +85 c t a operating temperature (note 11) ?40 ? +105 c functional operation above the stresses listed in the recommended operating ranges is not implied. extended exposure to stresse s beyond the recommended operating ranges limits may affect device reliability. 3. this is for functional operation only and not the lowest limit for all subsequent electrical specifications below. all electr ical parameters have a minimum of 3.0 v operation.
FUSB302B www. onsemi.com 14 dc and transient characteristics all typical values are at t a =25 c unless otherwise specified. table 9. baseband pd symbol parameter t a = ?40 to +85 c t a = ?40 to +105 c (note 11) t j = ?40 to +125 c unit min typ max ui unit interval 3.03 ? 3.70 s transmitter zdriver transmitter output impedance 33 ? 75 t enddrivebmc time to cease driving the line after the end of the last bit of the frame ? ? 23 s t holdlowbmc time to cease driving the line after the final high-to-low transition 1 ? ? s v oh logic high voltage 1.05 ? 1.2 0 v v ol logic low voltage 0 ? 75 mv t startdrive time before the start of the first bit of the preamble when the transmitter shall start driving the line ?1 ? 1 s t rise_tx rise time 300 ? ? ns t fall_tx fall time 300 ? ? ns receiver creceiver receiver capacitance when driver isn?t turned on ? 50 ? pf zbmcrx receiver input impedance 1 ? ? m trxfilter rx bandwidth limiting filter (note 4) 100 ? ? ns 4. guaranteed by characterization and/or design. not production tested. figure 16. transmitter test load cable connector connector switch drp switch drp ccableplug ccableplug receiver vconn vconn receiver
FUSB302B www. onsemi.com 15 table 10. type-c cc switch symbol parameter t a = ?40 to +85 c t a = ?40 to +105 c (note 11) t j = ?40 to +125 c unit min typ max r sw_ccx r dson for sw1_cc1 and sw1_cc2, vconn to cc1 & cc2 ? 0.4 1.2 i sw_ccx over-current protection (ocp) limit at which vconn switch shuts off over the entire vconn voltage range (ocpreg = 0fh) 600 800 1000 ma tsoftstart time taken for the vconn switch to turn on during which over-current protection is disabled ? 1.5 ? ms i 80_ccx src 80 a cc current (default) host_cur1 = 0, host_cur0 = 1 64 80 96 a i 180_ccx src 180 a cc current (1.5 a) host_cur1 = 1, host_cur0 = 0 166 180 194 a i 330_ccx src 330 a cc current (3 a) host_cur1 = 1, host_cur0 = 1 304 330 356 a v ufpdb snk pull-down voltage in dead battery under all pull-up src loads ? ? 2.18 v r device device pull-down resistance (note 5) 4.6 5.1 5.6 k zopen cc resistance for disabled state 126 ? ? k wake low wake threshold for cc pin src or snk low value. assumes bandgap and wake circuit turned on ie pwr[0] = 1 ? 0.25 ? v wake high wake threshold for cc pin src or snk high value. assumes bandgap and wake circuit turned on ie pwr[0] = 1 ? 1.45 ? v vbc_lvlhys hysteresis on the ra and rd comparators (note 7) ? 20 ? mv vbc_lvl cc pin thresholds, assumes pwr = 4?h7 bc = 2?b00 bc = 2?b01 bc = 2?b10 0.15 0.61 1.16 0.20 0.66 1.23 0.25 0.70 1.31 v vmdacstepcc measure block mdac step size for each code in mdac[5:0] register ? 42 ? mv vmdacstepvbus measure block mdac step size for each code in mdac[5:0] register for vbus measurement ? 420 ? mv vvbusthr vbus threshold at which i_vbusok interrupt is triggered. assumes measure block on ie pwr[2] = 1 ? ? 4.0 v ttog1 when toggle = 1, time at which internal versions of pu_en1 = pu_en2 = 0 and pwdn1 = pdwn2 = 1 selected to present externally as a snk in the drp toggle 30 45 60 ms ttog2 when toggle = 1, time at which internal versions of pu_en1 = 1 or pu_en2 = 1 and pwdn1 = pdwn2 = 0 selected to present externally as a src in the drp toggle 20 30 40 ms tdis disable time after a full toggle (ttog1 + ttog2) cycle so as to save power tog_save_pwr2:1 = 00 tog_save_pwr2:1 = 01 tog_save_pwr2:1 = 10 tog_save_pwr2:1 = 11 ? ? ? ? 0 40 80 160 ? ? ? ? ms tshut temp. for vconn switch off ? 145 ? c thys temp. hysteresis for vconn switch turn on ? 10 ? c 5. r device minimum and maximum specifications are only guaranteed when power is applied.
FUSB302B www. onsemi.com 16 table 11. current consumption symbol parameter v dd (v) conditions t a = ?40 to +85 c t a = ?40 to +105 c (note 11) t j = ?40 to +125 c unit min typ max idisable disabled current 3.0 to 5.5 nothing attached, no i 2 c transactions ? 0.37 5 .0 a idisable disabled current (note 11) 3.0 to 5.5 nothing attached, no i 2 c transactions ? 0.37 8.5 a itog unattached (standby) toggle current 3.0 to 5.5 nothing attached, toggle = 1, pwr[3:0] = 1h, wake_en = 0, tog_save_pwr2:1 = 01 ? 25 40 a ipd_stby_meas bmc pd standby current 3.0 to 5.5 device attached, bmc pd active but not sending or receiving anything, pwr[3:0] = 7h ? 40 ? a table 12. usb pd specific parameters symbol parameter t a = ?40 to +85 c t a = ?40 to +105 c (note 11) t j = ?40 to +125 c unit min typ max thardreset if a soft reset message fails, a hard reset is sent after thardreset of crcreceivetimer expiring ? ? 5 ms thardreset complete if the FUSB302B cannot send a hard reset within thardresetcomplete time because of a busy line, then a i_hardfail interrupt is triggered ? ? 5 ms treceive this is the value for which the crcreceivetimer expires. the crcreceivetimer is started upon the last bit of the eop of the transmitted packet 0.9 ? 1.1 ms tretry once the crcreceivetimer expires, a retry packet has to be sent out within tretry time. this time is hard to separate externally from treceive since they both happen sequentially with no visible difference in the cc output ? ? 75 s tsoftreset if a goodcrc packet is not received within treceive for nretries then a soft reset packet is sent within tsoftreset time. ? ? 5 ms ttransmit from receiving a packet, we have to send a goodcrc in response within ttransmit time. it is measured from the last bit of the eop of the received packet to the first bit sent of the preamble of the goodcrc packet ? ? 195 s table 13. io specifications symbol parameter v dd (v) conditions t a = ?40 to +85 c t a = ?40 to +105 c (note 11) t j = ?40 to +125 c unit min typ max host interface pins (int_n) v olintn output low voltage 3.0 to 5.5 i ol = 4 ma ? ? 0.4 v t int_mask time from global interrupt mask bit cleared to when int_n goes low 3.0 to 5.5 50 ? ? s i 2 c interface pins ? standard, fast, or fast mode plus speed mode (sda, scl) (note 6) v ili2c low-level input voltage 3.0 to 5.5 ? ? 0.51 v v ihi2c high-level input voltage 3.0 to 5.5 1.32 ? ? v
FUSB302B www. onsemi.com 17 table 13. io specifications symbol unit t a = ?40 to +85 c t a = ?40 to +105 c (note 11) t j = ?40 to +125 c conditions v dd (v) parameter symbol unit max typ min conditions v dd (v) parameter i 2 c interface pins ? standard, fast, or fast mode plus speed mode (sda, scl) (note 6) v hys hysteresis of schmitt trigger inputs 3.0 to 5.5 94 ? ? mv i i2c input current of sda and scl pins 3.0 to 5.5 input voltage 0.26 v to 2 .0 v ?10 ? 10 a i ccti2c vdd current when sda or scl is high 3.0 to 5.5 input voltage 1.8 v ?10 ? 10 a v olsda low-level output voltage (open-drain) 3.0 to 5.5 i ol = 2 ma 0 ? 0.35 v i olsda low-level output current (open-drain) 3.0 to 5.5 v olsda = 0.4 v 20 ? ? ma c i capacitance for each i/o pin (note 7) 3.0 to 5.5 ? 5 ? pf 6. i 2 c pull up voltage is required to be between 1.71 v and v dd . table 14. i 2 c specifications fast mode plus i 2 c specifications symbol parameter fast mode plus unit min max f scl i2c_scl clock frequency 0 1000 khz t hd;sta hold time (repeated) start condition 0. 26 ? s t low low period of i2c_scl clock 0.5 ? s t high high period of i2c_scl clock 0.26 ? s t su;sta set-up time for repeated start condition 0.26 ? s t hd;dat data hold time 0 ? s t su;dat data set-up time 50 ? ns t r rise time of i2c_sda and i2c_scl signals (note 7) ? 120 ns t f fall time of i2c_sda and i2c_scl signals (note 7) 6 120 ns t su;sto set?up time for stop condition 0.26 ? s t buf bus-free time between stop and start conditions (note 7) 0.5 ? s t sp pulse width of spikes that must be suppressed by the input filter 0 50 ns c b capacitive load for each bus line (note 7) ? 550 pf t vd?dat data valid time for data from scl low to sda high or low output (note 7) 0 0.45 s t vd?ack data valid time for acknowledge from scl low to sda high or low output (note 7) 0 0.45 s v nl noise margin at the low level (note 7) 0.2 ? v v nh noise margin at the high level (note 7) 0.4 ? v 7. guaranteed by characterization and/or design. not production tested .
FUSB302B www. onsemi.com 18 figure 17. definition of timing for full-speed mode devices on the i 2 c bus table 15. i 2 c slave address name bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 FUSB302Bucx, FUSB302Bmpx, FUSB302Bvmpx 0 1 0 0 0 1 0 r/w FUSB302B01mpx 0 1 0 0 0 1 1 r/w FUSB302B10mpx 0 1 0 0 1 0 0 r/w FUSB302B11mpx 0 1 0 0 1 0 1 r/w table 16. register definitions (notes 8 and 9) address register name type reg value bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 0x01 device id r 9x version id[3:0] product id[1:0] revision id[1:0] 0x02 switches0 r/w 3 pu_en2 pu_en1 vconn_ cc2 vconn_ cc1 meas_ cc2 meas_ cc1 pdwn2 pdwn1 0x03 switches1 r/w 20 power role spec rev1 spec rev0 data role auto_ crc txcc2 txcc1 0x04 measure r/w 31 meas_ vbus mdac5 mdac4 mdac3 mdac2 mdac1 mdac0 0x05 slice r/w 60 sdac_ hys1 sdac_ hys2 sdac5 sdac4 sdac3 sdac2 sdac1 sdac0 0x06 control0 r/w/c 24 tx_ flush int_mask host_ cur1 host_ cur0 auto_ pre tx_start 0x07 control1 r/w/c 0 ensop 2db ensop 1db bist_ mode2 rx_ flush ensop2 ensop1 0x08 control2 r/w 2 tog_ save_ pwr2 tog_ save_ pwr1 tog_rd_ only wake_en mode[1:0] toggle 0x09 control3 r/w 6 send_ hard_ bist_ tmode auto_ hard reset auto_ n_retries[1:0] auto_ retry reset softres et
FUSB302B www. onsemi.com 19 table 16. register definitions (notes 8 and 9) address bit 0 bit 1 bit 2 bit 3 bit 4 bit 5 bit 6 bit 7 reg value type register name 0x0a mask1 r/w 0 m_ vbusok m_ activity m_comp_ chng m_crc_c hk m_alert m_wake m_ collision m_bc_lvl 0x0b power r/w 1 pwr3 pwr2 pwr1 pwr0 0x0c reset w/c 0 pd_ reset sw_res 0x0d ocpreg r/w 0f ocp_ range ocp_ cur2 ocp_ cur1 ocp_ cur0 0x0e maska r/w 0 m_ocp_ temp m_ togdone m_soft fail m_retry fail m_hard sent m_ txsent m_ softrst m_ hardrst 0x0f maskb r/w 0 m_ gcrcsen t 0x10 control4 r/w 0 tog_ exit_aud 0x3c status0a r 0 softfail retry fail power3 power2 softrst hardrst 0x3d status1a r 0 togss3 togss2 togss1 rxsop 2db rxsop 1db rxsop 0x3e interrupta r/c 0 i_ocp_ temp i_ togdone i_ softfail i_retry fail i_hard sent i_txsent i_soft rst i_hard rst 0x3f interruptb r/c 0 i_gcrcs ent 0x40 status0 r 0 vbusok activity comp crc_chk alert wake bc_lvl1 bc_lvl0 0x41 status1 r 28 rxsop2 rxsop1 rx_ empty rx_full tx_ empty tx_full ovrtemp ocp 0x42 interrupt r/c 0 i_vbusok i_ activity i_comp_ chng i_crc_ chk i_alert i_wake i_ collision i_bc_lvl 0x43 fifos r/w (note 10) 0 write to tx fifo or read from rx fifo repeatedly without address auto increment type c bits usb pd bits general bits 8. do not use registers that are blank. 9. values read from undefined register bits are not defined and invalid . do not write to undefined registers. 10. fifo register is serially read/written without auto address increment. 11. automotive part only; FUSB302Bvmpx table 17. device id (address: 01h; reset value: 0x1001_xxxx; type: read) bit # name r/w/c size (bits) description 7:4 version id r 4 device version id by trim or etc. a_[revision id]: 1000 (e.g. a_reva) b_[revision id]: 1001 c_[revision id]: 1010 etc 3:2 product id r 2 ?01?, ?10? and ?11? applies to mlp only: 00: FUSB302Bmpx/FUSB302Bvmpx(default) & FUSB302Bucx 01: FUSB302B01mpx 10: FUSB302B10mpx 11: FUSB302B11mpx 1:0 revision id r 2 revision history of each version [version id]_reva: 00(e.g. reva) [version id]_revb: 01 (e.g. revb) [version id]_revc: 10 (e.g. revc) [version id]_revc: 11 (e.g. revd)
FUSB302B www. onsemi.com 20 table 18. switches0 (address: 02h; reset value: 0x0000_0011; type: read/write) bit # name r/w/c size (bits) description 7 pu_en2 r/w 1 1: apply host pull up current to cc2 pin 6 pu_en1 r/w 1 1: apply host pull up current to cc1 pin 5 vconn_cc2 r/w 1 1: turn on the vconn current to cc2 pin 4 vconn_cc1 r/w 1 1: turn on the vconn current to cc1 pin 3 meas_cc2 r/w 1 1: use the measure block to monitor or measure the voltage on cc2 2 meas_cc1 r/w 1 1: use the measure block to monitor or measure the voltage on cc1 1 pdwn2 r/w 1 1: device pull down on cc2. 0: no pull down 0 pdwn1 r/w 1 1: device pull down on cc1. 0: no pull down table 19. switches1 (address: 03h; reset value: 0x0010_0000; type: read/write) bit # name r/w/c size (bits) description 7 powerrole r/w 1 bit used for constructing the goodcrc acknowledge packet. this bit corresponds to the port power role bit in the message header if an sop packet is received: 1: source if sop 0: sink if sop 6:5 specrev1: specrev0 r/w 2 bit used for constructing the goodcrc acknowledge packet. these bits correspond to the specification revision bits in the message header: 00: revision 1.0 01: revision 2.0 10: do not use 11: do not use 4 datarole r/w 1 bit used for constructing the goodcrc acknowledge packet. this bit corresponds to the port data role bit in the message header. for sop: 1: src 0: snk 3 reserved n/a 1 do not use 2 auto_crc r/w 1 1: starts the transmitter automatically when a message with a good crc is received and automatically sends a goodcrc acknowledge packet back to the relevant sop* 0: feature disabled 1 txcc2 r/w 1 1: enable bmc transmit driver on cc2 pin 0 txcc1 r/w 1 1: enable bmc transmit driver on cc1 pin
FUSB302B www. onsemi.com 21 table 20. measure (address: 04h; reset value: 0x0011_0001; type: read/write) bit # name r/w/c size (bits) description 7 reserved n/a 1 do not use 6 meas_vbus r/w 1 0: mdac/comparator measurement is controlled by meas_cc* bits 1: measure vbus with the mdac/comparator. this requires meas_cc* bits to be 0 5:0 mdac[5:0] r/w 6 measure block dac data input. lsb is equivalent to 42 mv of voltage which is compared to the measured cc voltage. the measured cc is selected by meas_cc2, or meas_cc1 bits. mdac[5:0] meas_vbus = 0 meas_vbus = 1 unit 00_0000 0.042 0.420 v 00_0001 0.084 0.840 v 11_0000 2.058 20.58 v 11_0011 2.184 21.84 v 11_1110 2.646 26.46 v 11_1111 > 2.688 26.88 v table 21. slice (address: 05h; reset value: 0x0110_0000; type: read/write) bit # name r/w/c size (bits) description 7:6 sdac_hys[1:0] r/w 2 adds hysteresis where there are now two thresholds, the lower threshold which is always the value programmed by sdac[5:0] and the higher threshold that is: 11: 255 mv hysteresis: higher threshold = (sdac value + 20hex) 10: 170 mv hysteresis: higher threshold = (sdac value + ahex) 01: 85 mv hysteresis: higher threshold = (sdac value + 5) 00: no hysteresis: higher threshold = sdac value 5:0 sdac[5:0] r/w 6 bmc slicer dac data input. allows for a programmable threshold so as to meet the bmc receive mask under all noise conditions. table 22. control0 (address: 06h; reset value: 0x0010_0100; type: (see column below)) bit # name r/w/c size (bits) description 7 reserved n/a 1 do not use 6 tx_flush w/c 1 1: self clearing bit to flush the content of the transmit fifo 5 int_mask r/w 1 1: mask all interrupts 0: interrupts to host are enabled 4 reserved n/a 1 do not use 3:2 host_cur[1:0] r/w 2 1: controls the host pull up current enabled by pu_en[2:1]: 00: no current 01: 80 a ? default usb power 10: 180 a ? medium current mode: 1.5 a 11: 330 a ? high current mode: 3 a 1 auto_pre r/w 1 1: starts the transmitter automatically when a message with a good crc is received. this allows the software to take as much as 300 s to respond after the i_crc_chk interrupt is received. before starting the transmitter, an internal timer waits for approximately 170 s before executing the transmit start and preamble 0: feature disabled 0 tx_start w/c 1 1: start transmitter using the data in the transmit fifo. preamble is started first. during the preamble period the transmit data can start to be written to the transmit fifo. self clearing.
FUSB302B www. onsemi.com 22 table 23. control1 (address: 07h; reset value: 0x0000_0000; type: (see column below)) bit # name r/w/c size (bits) description 7 reserved n/a 1 do not use 6 ensop2db r/w 1 1: enable sop?_debug (sop double prime debug) packets 0: ignore sop?_debug (sop double prime debug) packets 5 ensop1db r/w 1 1: enable sop _debug (sop prime debug) packets 0: ignore sop _debug (sop prime debug) packets 4 bist_mode2 r/w 1 1: sent bist mode 01s pattern for testing 3 reserved n/a 1 do not use 2 rx_flush w/c 1 1: self clearing bit to flush the content of the receive fifo 1 ensop2 r/w 1 1: enable sop?(sop double prime) packets 0: ignore sop?(sop double prime) packets 0 ensop1 r/w 1 1: enable sop (sop prime) packets 0: ignore sop (sop prime) packets table 24. control2 (address: 08h; reset value: 0x0000_0010; type: (see column below)) bit # name r/w/c size (bits) description 7:6 tog_save_pwr2: tog_save_pwr1 n/a 2 00: don?t go into the disable state after one cycle of toggle 01: wait between toggle cycles for t dis time of 40 ms 10: wait between toggle cycles for t dis time of 80 ms 11: wait between toggle cycles for t dis time of 160 ms 5 tog_rd_only r/w 1 1: when toggle=1 only rd values will cause the toggle state machine to stop toggling and trigger the i_toggle interrupt 0: when toggle=1, rd and ra values will cause the toggle state machine to stop toggling 4 reserved n/a 1 do not use 3 wake_en r/w 1 1: enable wake detection functionality if the power state is correct 0: disable wake detection functionality 2:1 mode r/w 2 11: enable src polling functionality if toggle=1 10: enable snk polling functionality if toggle=1 01: enable drp polling functionality if toggle=1 00: do not use 0 toggle r/w 1 1: enable drp, snk or src toggle autonomous functionality 0: disable drp, snk and src toggle functionality
FUSB302B www. onsemi.com 23 table 25. contorl3 (address: 09h; reset value: 0x0000_0110; type: (see column below)) bit # name r/w/c size (bits) description 7 reserved n/a 1 do not use 6 send_hard_reset w/c 1 1: send a hard reset packet (highest priority) 0: don?t send a soft reset packet 5 bist_tmode r/w 1 1: bist mode. receive fifo is cleared immediately after sending goodcrc response 0: normal operation, all packets are treated as usual 4 auto_hardreset r/w 1 1: enable automatic hard reset packet if soft reset fail 0: disable automatic hard reset packet if soft reset fail 3 auto_softreset r/w 1 1: enable automatic soft reset packet if retries fail 0: disable automatic soft reset packet if retries fail 2:1 n_retries[1:0] r/w 2 11: three retries of packet (four total packets sent) 10: two retries of packet (three total packets sent) 01: one retry of packet (two total packets sent) 00: no retries (similar to disabling auto retry) 0 auto_retry r/w 1 1: enable automatic packet retries if goodcrc is not received 0: disable automatic packet retries if goodcrc not received table 26. mask (address: 0ah; reset value: 0x0000_0000; type: read/write) bit # name r/w/c size (bits) description 7 m_vbusok r/w 1 1: mask i_vbusok interrupt bit 0: do not mask 6 m_activity r/w 1 1: mask interrupt for a transition in cc bus activity 0: do not mask 5 m_comp_chng r/w 1 1: mask i_comp_chng interrupt for change is the value of comp, the measure comparator 0: do not mask 4 m_crc_chk r/w 1 1: mask interrupt from crc_chk bit 0: do not mask 3 m_alert r/w 1 1: mask the i_alert interrupt bit 0: do not mask 2 m_wake r/w 1 1: mask the i_wake interrupt bit 0: do not mask 1 m_collision r/w 1 1: mask the i_collision interrupt bit 0: do not mask 0 m_bc_lvl r/w 1 1: mask a change in host requested current level 0: do not mask table 27. power (address: 0bh; reset value: 0x0000_0001; type: read/write) bit # name r/w/c size (bits) description 7:4 reserved n/a 4 do not use 3:0 pwr[3:0] r/w 4 power enables: pwr[0]: bandgap and wake circuit pwr[1]: receiver powered and current references for measure block pwr[2]: measure block powered pwr[3]: enable internal oscillator
FUSB302B www. onsemi.com 24 table 28. reset (address: 0ch; reset value: 0x0000_0000; type: write/clear) bit # name r/w/c size (bits) description 7:2 reserved n/a 6 do not use 1 pd_reset w/c 1 1: reset just the pd logic for both the pd transmitter and receiver 0 sw_res w/c 1 1: reset the FUSB302B including the i 2 c registers to their default values table 29. ocpreg (address: 0dh; reset value: 0x0000_1111; type: read/write) bit # name r/w/c size (bits) description 7:4 reserved n/a 4 do not use 3 ocp_range r/w 1 1: ocp range between 100?800 ma (max_range = 800 ma) 0: ocp range between 10?80 ma (max_range = 80 ma) 2:0 ocp_cur2, ocp_cur1, ocp_cur0 r/w 3 111: max_range (see bit definition above for ocp_range) 110: 7 max_range / 8 101: 6 max_range / 8 100: 5 max_range / 8 011: 4 max_range / 8 010: 3 max_range / 8 001: 2 max_range / 8 000: max_range / 8 table 30. maska (address: 0eh; reset value: 0x0000_0000; type: read/write) bit # name r/w/c size (bits) description 7 m_ocp_temp r/w 1 1: mask the i_ocp_temp interrupt 6 m_togdone r/w 1 1: mask the i_togdone interrupt 5 m_softfail r/w 1 1: mask the i_softfail interrupt 4 m_retryfail r/w 1 1: mask the i_retryfail interrupt 3 m_hardsent r/w 1 1: mask the i_hardsent interrupt 2 m_txsent r/w 1 1: mask the i_txsent interrupt 1 m_softrst r/w 1 1: mask the i_softrst interrupt 0 m_hardrst r/w 1 1: mask the i_hardrst interrupt table 31. maskb (address: 0fh; reset value: 0x0000_0000; type: read/write) bit # name r/w/c size (bits) description 7:1 reserved n/a 6 do not use 0 m_gcrcsent r/w 1 1: mask the i_gcrcsent interrupt table 32. control4 (address: 00h; reset value: 0x0000_0000; type: read/write) bit # name r/w/c size (bits) description 7:1 reserved n/a 6 do not use 0 tog_exit_aud r/w 1 1: in auto rd only toggle mode, stop toggle at audio accessory (ra on both cc)
FUSB302B www. onsemi.com 25 table 33. status0a (address: 3ch; reset value: 0x0000_0000; type: read) bit # name r/w/c size (bits) description 7:6 reserved n/a 2 do not use 5 softfail r 1 1: all soft reset packets with retries have failed to get a goodcrc acknowledge. this status is cleared when a start_tx, txon or send_hard_reset is executed 4 retryfail r 1 1: all packet retries have failed to get a goodcrc acknowledge. this status is cleared when a start_tx, txon or send_hard_reset is executed 3:2 power3:power2 r 2 internal power state when logic internals needs to control the power state. power3 corresponds to pwr3 bit and power2 corresponds to pwr2 bit. the power state is the higher of both pwr[3:0] and {power3, power2, pwr[1:0]} so that if one is 03 and the other is f then the internal power state is f 1 softrst r 1 1: one of the packets received was a soft reset packet 0 hardrst r 1 1: hard reset pd ordered set has been received table 34. status1a (address: 3dh; reset value: 0x0000_0000; type: read) bit # name r/w/c size (bits) description 7:6 reserved n/a 2 do not use 5:3 togss3, togss2, togss1 r 3 000: toggle logic running (processor has previously written toggle=1) 001: toggle functionality has settled to srcon cc1 (stop_src1 state) 010: toggle functionality has settled to srcon cc2 (stop_src2 state) 101: toggle functionality has settled to snkon cc1 (stop_snk1 state) 110: toggle functionality has settled to snkon cc2 (stop_snk2 state) 111: toggle functionality has detected audioaccessory with vra on both cc1 and cc2 (settles to stop_src1 state) otherwise: not defined (do not interpret) 2 rxsop2db r 1 1: indicates the last packet placed in the rxfifo is type sop?_debug (sop double prime debug) 1 rxsop1db r 1 1: indicates the last packet placed in the rxfifo is type sop?_debug (sop prime debug) 0 rxsop r 1 1: indicates the last packet placed in the rxfifo is type sop
FUSB302B www. onsemi.com 26 table 35. interrupta (address: 3eh; reset value: 0x0000_0000; type: read/clear) bit # name r/w/c size (bits) description 7 i_ocp_temp r/c 1 1: interrupt from either a ocp event on one of the vconn switches or an over-temperature event 6 i_togdone r/c 1 1: interrupt indicating the toggle functionality was terminated because a device was detected 5 i_softfail r/c 1 1: interrupt from automatic soft reset packets with retries have failed 4 i_retryfail r/c 1 1: interrupt from automatic packet retries have failed 3 i_hardsent r/c 1 1: interrupt from successfully sending a hard reset ordered set 2 i_txsent r/c 1 1: interrupt to alert that we sent a packet that was acknowledged with a goodcrc response packet 1 i_softrst r/c 1 1: received a soft reset packet 0 i_hardrst r/c 1 1: received a hard reset ordered set table 36. interruptb (address: 3fh; reset value: 0x0000_0000; type: read/clear) bit # name r/w/c size (bits) description 7 reserved n/a 6 do not use 0 i_gcrcsent r/c 1 1: sent a goodcrc acknowledge packet in response to an incoming packet that has the correct crc value
FUSB302B www. onsemi.com 27 table 37. status0 (address: 40h; reset value: 0x0000_0000; type: read) bit # name r/w/c size (bits) description 7 vbusok r 1 1: interrupt occurs when vbus transitions through vvbusthr. this bit typically is used to recognize port partner during startup 6 activity r 1 1: transitions are detected on the active cc* line. this bit goes high after a minimum of 3 cc transitions, and goes low with no transitions 0: inactive 5 comp r 1 1: measured cc* input is higher than reference level driven from the mdac 0: measured cc* input is lower than reference level driven from the mdac 4 crc_chk r 1 1: indicates the last received packet had the correct crc. this bit remains set until the sop of the next packet 0: packet received for an enabled sop* and crc for the enabled packet received was incorrect 3 alert r 1 1: alert software an error condition has occurred. an alert is caused by: tx_full: the transmit fifo is full rx_full: the receive fifo is full see status1 bits 2 wake r 1 1: voltage on cc indicated a device attempting to attach 0: wake either not enabled (wake_en=0) or no device attached 1:0 bc_lvl[1:0] r 2 current voltage status of the measured cc pin interpreted as host current levels as follows: 00: < 200 mv 01: > 200 mv, < 660 mv 10: > 660 mv, < 1.23 v 11: > 1.23 v note the software must measure these at an appropriate time, while there is no signaling activity on the selected cc line. bc_lvl is only defined when measure block is on which is when register bits pwr[2]=1 and either meas_cc1=1 or meas_cc2=1 table 38. status1 (address: 41h; reset value: 0x0010_1000; type: read) bit # name r/w/c size (bits) description 7 rxsop2 r 1 1: indicates the last packet placed in the rxfifo is type sop? (sop double prime) 6 rxsop1 r 1 1: indicates the last packet placed in the rxfifo is type sop? (sop prime) 5 rx_empty r 1 1: the receive fifo is empty 4 rx_full r 1 1: the receive fifo is full 3 tx_empty r 1 1: the transmit fifo is empty 2 tx_full r 1 1: the transmit fifo is full 1 ovrtemp r 1 1: temperature of the device is too high 0 ocp r 1 1: indicates an over-current or short condition has occurred on the vconn switch
FUSB302B www. onsemi.com 28 table 39. interrupt (address: 42h; reset value: 0x0000_0000; type: read/clear) bit # name r/w/c size (bits) description 7 i_vbusok r/c 1 1: interrupt occurs when vbus transitions through 4.5 v. this bit typically is used to recognize port partner during startup 6 i_activity r/c 1 1: a change in the value of activity of the cc bus has oc- curred 5 i_comp_chng r/c 1 1: a change in the value of comp has occurred. indicates se- lected cc line has tripped a threshold programmed into the mdac 4 i_crc_chk r/c 1 1: the value of crc_chk newly valid. i.e. the validity of the incoming packet has been checked 3 i_alert r/c 1 1: alert software an error condition has occurred. an alert is caused by: tx_full: the transmit fifo is full rx_full: the receive fifo is full see status1 bits 2 i_wake r/c 1 1: voltage on cc indicated a device attempting to attach. software must then power up the clock and receiver blocks 1 i_collision r/c 1 1: when a transmit was attempted, activity was detected on the active cc line. transmit is not done. the packet is received normally 0 i_bc_lvl r/c 1 1: a change in host requested current level has occurred table 40. fifos (address: 43h; reset value: 0x0000_0000; type: (see column below)) bit # name r/w/c size (bits) description 7:0 tx/rx token read or write 8 writing to this register writes a byte into the transmit fifo. reading from this register reads from the receive fifo. each byte is a coded token. or a token followed by a fixed number of packed data byte ( see token coding in table 41 ) software model port software interacts with the port chip in two primary ways: ? i 2 c registers ? 8 bit data tokens sent to or received from the fifo register ? all reserved bits written in the txfifo should be 0 and all reserved bit read from the rxfifo should be ignored transmit data tokens transmit data tokens provide in-sequence transmit control and data for the transmit logic. note that the token codes, and their equivalent usb pd k-code are not the same. t okens are read one at a time when they reach the end of the tx fifo. i.e., the specified token action is performed before the next token is read from the tx fifo. the tokens are defined as follows:
FUSB302B www. onsemi.com 29 table 41. tokens used in fifo code name size (bytes) description 101x?xxx1 (0xa1) txon 1 alternative method for starting the transmitter with the tx?start bit. this is not a token written to the txfifo but a command much like tx_start but it is more convenient to write it while writing to the txfifo in one contiguous write operation. it is preferred that the txfifo is first written with data and then txon or tx_start is executed. it is expected that a1h will be written for txon not any other bits where x is non-zero such as b1h, bfh, etc 0x12 sop1 1 when reaching the end of the fifo causes a sync?1 symbol to be transmitted 0x13 sop2 1 when reaching the end of the fifo causes a sync?2 symbol to be transmitted 0x1b sop3 1 when reaching the end of the fifo causes a sync?3 symbol to be transmitted 0x15 reset1 1 when reaching the end of the fifo causes a rst?1 symbol to be transmitted 0x16 reset2 1 when reaching the end of the fifo causes a rst?2 symbol to be transmitted 0x80 packsym 1+n this data token must be immediately followed by a sequence of n packed data bytes. this token is defined by the 3 msb?s being set to 3?b100. the 5 lsb?s are the number of packed bytes being sent. note: n cannot be less than 2 since the minimum control packet has a header that is 2 bytes and n cannot be greater than 30 since the maximum data packet has 30 bytes (2 byte header + 7 data objects each having 4 bytes) packed data bytes have two 4 bit data fields. the 4 lsb?s are sent first, after 4b5b conversion etc in the chip 0xff jam_crc 1 causes the crc, calculated by the hardware, to be inserted into the transmit stream when this token reaches the end of the tx fifo 0x14 eop 1 causes an eop symbol to be sent when this token reaches the end of the tx fifo 0xfe txoff 1 turn off the transmit driver. typically the next symbol after eop receive data tokens receive data tokens provide in-sequence receive control and data for the receive logic. the rxfifo can absorb as many packets as the number of bytes in the rxfifo (80 bytes). the tokens are defined as follows: table 42. tokens used in rxfifo code name size (bytes) description 111b_bbbb sop 1 first byte of a received packet to indicate that the packet is an sop packet (?b? is undefined and can be any bit) 110b_bbbb sop1 1 first byte of a received packet to indicate that the packet is an sop? packet and occurs only if ensop1=1 (?b? is undefined and can be any bit) 101b_bbbb sop2 1 first byte of a received packet to indicate that the packet is an sop? packet and occurs only if ensop2=1 (?b? is undefined and can be any bit) 100b_bbbb sop1db 1 first byte of a received packet to indicate that the packet is an sop?_debug packet and occurs only if ensop1db=1 (?b? is undefined and can be any bit) 011b_bbbb sop2db 1 first byte of a received packet to indicate that the packet is an sop?_debug packet and occurs only if ensop2db=1 (?b? is undefined and can be any bit) 010b_bbbb/ 001b_bbbb/ 000b_bbbb do not use 1 these can be used in future versions of this device and should not be relied on to be any special value. (?b? is undefined and can be any bit)
FUSB302B www. onsemi.com 30 reference schematic figure 18. fusb302/FUSB302B reference schematic diagram r pu vconn v pu vdd c bulk c vdd1 c vdd2 c vconn scl sda int_n r pu r pu_int cc1 cc2 gnd cc2 cc1 c1 a1 c2 c recv c recv vbus_in FUSB302B v bus v conn v od scl sda int_n a2 b1 a3 b3 c3 b2 j2 usb typ-c a1 a2 a3 a4 a5 a6 a7 a8 a9 a10 a11 a12 b1 b2 b3 b4 b5 b6 b7 b8 b9 b10 b11 b12 gnda1 tx1p tx1m vbusa1 cc1 dpa dma rfu1 vbusa2 rx2m rx2p gnda2 gndb1 tx2p tx2m vbusb1 cc2 dpb dpb dmb rfu2 vbusb2 rx1m rx1p gndb2 table 43. recommended component values for reference schematic symbol parameter recommended value unit min typ max c recv cc x receiver capacitance 200 ? 600 pf c bulk vconn source bulk capacitance 10 ? 220 f c vconn vconn decoupling capacitance ? 0.1 ? f c vdd1 v dd decoupling capacitance ? 0.1 ? f c vdd2 v dd decoupling capacitance ? 1.0 ? f r pu i 2 c pull-up resistors ? 4.7 ? k r pu_int int_n pull-up resistor 1.0 4.7 ? k v pu i 2 c pull-up voltage 1.71 ? v dd v the table below is in reference to the wlcsp package drawing on the following page. table 44. product-specific dimensions product d e x y FUSB302Bucx 1.260 mm 1.215 mm 0.2075 mm 0.230 mm
FUSB302B www. onsemi.com 31 package dimensions wlcsp9 1.26x1.215x0.526 case 567tn issue o date 31 mar 201 7
FUSB302B www. onsemi.com 32 package dimensions wqfn14 2.5x2.5, 0.5p case 510br issue o a b notes: a. no jedec registration. b. dimensions are in millimeters. c. dimensions and tolerances per asme y14.5m, 2009. d. land pattern recommendation is existing industry land pattern. bottom view 0.10 c a b 0.05 c top view recommended land pattern 0.08 c seating plane 0.10 c 0.025 0.025 1 4 7 3 8 10 11 14 0.75 0.05 pin #1 ident 2.50 2.50 2.43 1.45 1.45 2.43 0.50 typ 0.30 typ (0.58) 0.05 c 2x 0.05 c 2x 0.15 0.05 c front view 2.50 0.05 1.45 0.05 1.45 0.05 0.50 0.50 0.24 0.06 (14x) 0.30(14x) pin #1 ident on semiconductor and are trademarks of semiconductor components industries, llc dba on semiconductor or its subsidiaries i n the united states and/or other countries. on semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. a listing of on semiconductor?s product/patent coverage may be accessed at www.onsemi.com/site/pdf/patent?marking.pdf . on semiconductor reserves the right to make changes without further notice to any products herein. on semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular pu rpose, nor does on semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without li mitation special, consequential or incidental damages. buyer is responsible for its products and applications using on semiconductor products, including compliance with all laws, regulatio ns and safety requirements or standards, regardless of any support or applications information provided by on semiconductor. ?typical? parameters which may be provided in on semicond uctor data sheets and/or specifications can and do vary in dif ferent applications and actual performance may vary over time. all operating parameters, including ?typicals? mus t be validated for each customer application by customer?s technical experts. on semiconductor does not convey any license under its patent rights nor the rights of others. on semiconduc tor products are not designed, intended, or authorized for use as a critical component in life support systems or any fda class 3 medical devices or medical devices with a same or si milar classification in a foreign jurisdiction or any devices intended for implantation in the human body. should buyer purchase or use on semiconductor products for any such unintended or unauthorized application, buyer shall indemnify and hold on semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, cost s, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized u se, even if such claim alleges that on semiconductor was negligent regarding the design or manufacture of the part. on semiconductor is an equal opportunity/affirmative action employer . this literature is subject to all applicable copyright laws and is not for resale in any manner. p ublication ordering information n. american technical support : 800?282?9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81?3?5817?1050 FUSB302B/d i 2 c bus is a trademark of philips corporation. all other brand names and product names appearing in this document are registered trademarks or trademarks of their respective holders. literature fulfillment : literature distribution center for on semiconductor 19521 e. 32nd pkwy, aurora, colorado 80011 usa phone : 303?675?2175 or 800?344?3860 toll free usa/canada fax : 303?675?2176 or 800?344?3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your loc al sales representative ?

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